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专利摘要:
An amplifier circuit includes: an amplifier (102) having a first input coupled to an input node of the amplifier circuit via a first resistor (R1) and a load coupled output (104) via a coupling capacitor (112), the output being coupled to the first input via a second resistor (R2); and a current ramp generator (114) adapted to provide a current ramp at the first input of the amplifier during a power-up phase or a power-off phase of the amplifier circuit to control the charging or discharge of the coupling capacitor. 公开号:FR3025373A1 申请号:FR1457987 申请日:2014-08-26 公开日:2016-03-04 发明作者:Emmanuel Grand;Sebastien Genevey;Arthur Veith;Paul Giletti 申请人:Dolphin Integration SA; IPC主号:
专利说明:
[0001] The present description relates to the field of audio amplifiers, and in particular an audible switching noise reduction circuit, commonly referred to as "pop noise", in an audio amplifier. BACKGROUND ART Switching noise also known as "pop noise" is a well known problem in audio amplifiers, and corresponds to a "snap" or "click" when the amplifier is turned on or off. . This noise is due to the fact that the amplifier is coupled to the load, such as a loudspeaker or earphone, via a coupling capacitor. The coupling capacitor blocks the DC level at the output of the amplifier, so that the load only receives the useful audio signal. In order to obtain a reasonable response at low frequencies, the coupling capacitor is generally relatively large, typically at least 100 μF for a load of 16 ohms. The switching noise results from charging or fast discharging of this coupling capacitor when the amplifier is turned on or off. The input signal of the amplifier is generally provided by a digital-to-analog converter (DAC), and a solution that has been proposed to reduce switching noise is to initially control the DAC to provide a low signal to the amplifier, and gradually increase this signal to charge the coupling capacitor. However, a disadvantage of such a solution is that it adds complexity to the DAC, and in some embodiments it may be desirable not to include DACs. [0002] There is therefore a need in the art for an alternative solution for reducing the switching noise at the output of an audio amplifier. SUMMARY An object of embodiments of the present disclosure is to at least partially solve one or more needs of the prior art. In one aspect, there is provided an amplifier circuit comprising: an amplifier having a first input coupled to an input node of the amplifier circuit via a first resistor and an output coupled to a load via a coupling capacitor, the output being coupled to the first input via a second resistor; and a current ramp generator adapted to provide a current ramp at the first input of the amplifier 25 during a power-up phase or a power-off phase of the amplifier circuit to control the charging or discharging speed of the amplifier. coupling capacitor. According to one embodiment, during a power up phase of the amplifier circuit, the current ramp generator is adapted to provide a current ramp starting at a first level and going down to a second level. According to one embodiment, the first level is high enough to cause saturation of the amplifier. [0003] According to one embodiment, the second level is less than or equal to 1 itA. According to one embodiment, the current ramp has a gradient which results in a voltage gradient of at least 1 V / s on the output of the amplifier circuit. According to one embodiment, the current ramp generator is adapted to convert a first voltage ramp into said current ramp. According to one embodiment, the current ramp generator comprises a differential pair, a first one of the transistors of the differential pair being controlled by the first voltage ramp. According to one embodiment, a second one of the transistors of the differential pair is controlled by a second voltage ramp having a sign gradient opposite that of the first voltage ramp. According to one embodiment, the amplifier is mounted in inverting amplifier configuration. In another aspect, there is provided a method for energizing or de-energizing an amplifier circuit, comprising: providing a current ramp at a first input of an amplifier of the amplifier circuit, the first input being coupled to a node of input of the amplifier circuit via a first resistor, an output of the amplifier being coupled to a load via a coupling capacitor and at the first input via a second resistor, the current ramp controlling the charging or discharging speed of the coupling capacitor; and applying an input signal to the input node of the amplifier circuit. BRIEF DESCRIPTION OF THE DRAWINGS The above and other features and advantages will be apparent from the following detailed description of embodiments, given by way of illustration and not limitation, with reference to the accompanying drawings in FIG. which: schematically illustrates an audio amplifier coupled to a load according to an exemplary embodiment of the present description; FIG. 2 diagrammatically illustrates an audio amplifier coupled to a load according to another embodiment of the present description; FIG. 3 schematically illustrates a current ramp generator of the circuit of FIGS. 1 or 2 according to an exemplary embodiment; FIG. 4A is a graph illustrating an example of voltage ramps in the circuit of FIG. 3 according to an exemplary embodiment; FIG. 4B is a graph illustrating an example of current ramps generated by the circuit of FIG. 3 according to an exemplary embodiment; FIG. 5 illustrates in greater detail the current ramp generator of FIGS. 1 or 2 according to another exemplary embodiment; FIG. 6A is a graph illustrating an example of voltage ramps in the circuit of FIG. 5 according to an exemplary embodiment; and FIG. 6B is a graph illustrating an example of current ramps generated by the circuit of FIG. 5 according to an exemplary embodiment. DETAILED DESCRIPTION While in the following description embodiments according to an inverting amplifier configuration are described, it will be apparent to those skilled in the art that the embodiments described herein could be adapted to other types. amplifiers, such as a non-inverting amplifier. FIG. 1 illustrates an amplifier circuit 100 according to an exemplary embodiment of the present description. The circuit 3025373 includes an amplifier (AMP) 102, which is for example a differential amplifier, as an operational amplifier. The output of the amplifier 102 drives a LOAD 104, such as loudspeakers or headphones. The amplifier circuit 100 is mounted in an inverting amplifier configuration, with a resistor R1 coupled between a negative input node of the amplifier 102 and an input node 106 of the amplifier circuit, and a resistor R2 coupled between the negative input node and an output node 108 of the amplifier 102. The resistors R1 and R2 each have for example a resistance in the range of 1 to 100 kilo-ohms, and the ratio between their resistances determines the gain of the inverting amplifier. A positive input node of the amplifier is for example coupled to a common mode voltage VCM. The amplifier 102 is for example coupled to a supply voltage rail for receiving a supply voltage VDD and to a ground voltage rail. The common mode voltage is for example at a level substantially equal to half of the supply voltage VDD. In alternative embodiments, rather than being grounded, the low voltage rail could be at a different voltage level such as a negative voltage, and the common mode voltage is for example about mid-point, different from the mass of the load 104, between the voltage levels of the supply voltage rail and the low voltage rail. The input node 106 receives a VIN input signal to be amplified. The VIN input signal is for example provided by a digital-to-analog converter (DAC) 110, which for example receives a digital signal (not shown) and converts the digital signal into the VIN analog input signal. In alternative embodiments, in place of a. DAC, a different type of input circuit could provide the VIN input signal. The output node 108 of the amplifier 102 is coupled via a coupling capacitor 112 to the load 104. The coupling capacitor, for example, has a capacitance of the order of 1 to 500 ° IF. depending on the load resistance and the signal bandwidth. In one example, the load is 16 ohms, and the coupling capacitor has a capacity of about 120 μF. In another example, the load is 10 kilo, ohms, and the coupling capacitor has a capacity of about 1 I.LF. In some embodiments, the coupling capacitor 112 is mounted outside the chip. The amplifier circuit 100 furthermore comprises a current ramp generator (CURRENT RAMP GENERATOR) 114 coupled, in the example of FIG. 1, to the negative input node of the amplifier 102, and adapted to supply a current ramp. at this node during a power up or power down phase of the amplifier circuit, in order to control the charging or discharging speed of the coupling capacitor 112. In this way, the switching noise can be reduced or avoided. In particular, during a power-up phase of the amplifier 102, initially the input signal VIN is maintained at a fixed level, for example at the common mode voltage VON. The amplifier is then powered on. For example, in one embodiment, the amplifier 102 includes an input for receiving a power off signal PD that is turned on during the power off phase of the amplifier 102 to turn off one or more branches of the amplifier. In order to energize the amplifier 102, the signal PD is for example brought to a level which activates the current branches of the amplifier 102. The current ramp generator 114 is thus adapted to generating a current ramp that starts at an initial level high enough to saturate the amplifier 102. Thus the output of the amplifier 102 is at or near the level of the low supply voltage, for example at the mass. While the current is supplied to the input node of the amplifier 102, the circuit operates as a transimpedance amplifier, in other words as a current-voltage converter, the output voltage being a function of the current level. Assuming that the low supply voltage is at ground, the voltage VOUT at the output of the amplifier 102 is equal to Vcm-R2 * I. The current I is for example initially selected such that I * R2 is equal to at least VCM, so that the amplifier 102 is saturated. The current I is then reduced to a low level. In order to avoid a current in the coupling capacitor 112 which could provoke a switching noise, the gradient of the current ramp is for example chosen such that the voltage VOUT at the output of the amplifier 102 does not vary moreover. 10 that a certain threshold, for example chosen between 1 and 10 V / s depending on the type of load, and for example such that the voltage gradient is at least 1 V / s. The current drops for example to a low level at zero or close to zero which could be considered a negligible level. For example, stream 15 drops to a level of 1 or less. Once the current I has reached the low level, the input signal VIN is for example applied to the input node 106, and the amplifier circuit 100 operates normally to amplify the input signal VIN and drive the load 104. [0004] During a phase of de-energizing the amplifier circuit 100, the operation is for example the opposite of that of the power-up phase described above. In particular, the input signal VIN is for example brought to the low state, and a rising current ramp is applied by the current ramp generator 114 to the negative input node of the amplifier 102. When the current reaches the level for which the amplifier 102 is saturated, its output voltage being equal to or close to the low supply voltage, for example ground, the amplifier 102 is de-energized, for example, by activating the power off signal PD. Figure 2 schematically illustrates an amplifier circuit 200 very similar to that of Figure 1, and similar elements bear the same numerical references and will not be described again in detail. However, in the embodiment of FIG. 2, amplifier 102 is driven by differential input signals. Indeed, rather than being directly connected to the common mode voltage VCM, the positive input node of the amplifier 102 is coupled to the common mode voltage VCM through a resistor R3. In addition, the positive input node is additionally coupled via another resistor R1 'to another input node 106' of the amplifier circuit. The input nodes 106 and 106 'receive differential input signals VIN + and VIN_, which are for example provided by a DAC 210, based on a digital input signal (not shown). As with the DAC 110, in alternative embodiments the DAC 210 could be replaced by a different type of input circuit. The operation of the circuit of FIG. 2 is for example very similar to that of FIG. 1, and will not be described again in detail. In one embodiment, the current ramp generator 114 of Figures 1 and 2 is adapted to generate linear current ramps. An example of a circuit for generating such linear current ramps will now be described in more detail with reference to FIG. 3. FIG. 3 schematically illustrates a current ramp generator 114 according to an exemplary embodiment in which it comprises a differential amplifier 304 having its negative input node coupled to an input node 305 receiving a voltage signal V1, and having its output node 306 coupled to the control nodes of transistors 308 and 310, which are for example transistors MOS. The transistor 308 is coupled by its main current nodes, for example its source and drain nodes in the case where it is a MOS transistor, between the power supply voltage VDD and the positive input node of the transistor. the differential amplifier 304. The positive input node is also coupled to ground via a resistor 312. The transistor 310 has for example one of its main current nodes coupled to the supply voltage VDD, and its other main current node 35 supplies current I to the output of the current ramp generator. [0005] The voltage signal V1 is generated by a voltage ramp generation circuit 314. FIG. 3 illustrates an example of this circuit, which comprises for example a capacitor 316 coupled between the node 305 and the ground. The capacitor 316 is for example adapted to be charged by a current source 318, which is for example coupled in series with a switch 320 between the node 305 and the supply voltage VDD. The capacitor 316 is for example adapted to be discharged by a current source 322, which is for example coupled in series with a switch 324 between the node 305 and the ground. The operation of the current ramp generator 314 of Fig. 3 will now be described with reference to Figs. 4A and 4B. Fig. 4A is a graph illustrating examples of the voltage signal V1, and Fig. 4B is a graph illustrating examples of the current signal supplied by the current ramp generator 114. As shown in Fig. 4A, during the In the power up phase of the amplifier circuit of FIG. 1 or 2, the voltage signal V1 comprises a downward voltage ramp which begins, for example, at a level 402, then descends linearly to a level equal to or close to of the mass voltage. As illustrated in FIG. 4B, the downward voltage ramp causes a corresponding downward current ramp, which starts at a level 404 and goes down linearly to a level equal to or close to zero. The initial level 404 and the gradient of the downward current ramp are determined by the initial level 402 and the gradient of the downward voltage ramp of the signal V1. Referring again to FIG. 4A, during a decommissioning phase In the amplifier circuit of FIG. 1 or 2, the voltage signal V1 comprises a rising voltage ramp, which for example starts at a low level or close to the ground and goes linearly up to the level 402. [0006] Referring again to FIG. 4B, the rising voltage ramp causes a corresponding rising current ramp, which begins at a level close to zero or zero, and increases linearly to the level 404. FIG. Final level 404 and the gradient of the rising current ramp are determined by the final level 402 and the gradient of the rising voltage ramp of the signal Vl. The switching noise is generally defined by the amplitude of the peak voltage on load. The value is expressed in A-weighted DbV, which takes into account the noise level perceived by the human ear. The behavior of the human ear is generally modeled by a band-pass filter, called a weighting filter A. The linear current ramp of the example of FIG. 4B has a gradient which is relatively small, resulting in low frequency spectrum not audible by the human ear. Such a linear ramp is, for example, relatively long, for example between 500 ms and 1 s, and in some embodiments, it may be desirable to have a faster ramp to speed up the power-on and turn-off sequences. of the audio amplifier. The present inventors have noted that the shape of the weighting filter A and the shape of the DC blocking high-pass filter formed by the coupling capacitor and the load, correspond in the time domain to two derivatives applied to the output signal. of the amplifier. However, the linear shape of the ramp contains discontinuities at the beginning and end that generate a wide-spectrum signal in the audio band, which is not filtered by both filters. Therefore, in some embodiments, a non-linear current ramp is advantageously used in place of a linear current ramp. FIG. 5 illustrates the current ramp generator 114 of FIGS. 1 and 2 according to an exemplary embodiment 35 in which the generated current ramps are non-linear. The generator 500 of FIG. 5 comprises a differential pair 502, 504. Each transistor 502, 504 of the differential pair has one of its main current nodes coupled to a common node 506, which is itself coupled to the mass via a current source 508. The transistor 502 has its other main current node coupled to the supply voltage VDD, and is controlled at its control node by a voltage signal V2 which includes a voltage ramp. The other main current node of the transistor 504 supplies the current I to the output of the current ramp generator 500, and is controlled at its control node by a voltage signal Vl. In some embodiments, the voltage signal V1 comprises a voltage ramp having a gradient of sign opposite to that of the voltage ramp V2. The voltage ramps V1 and V2 are for example generated by voltage ramp generators (not shown) similar to the generator 314 of FIG. 3. In alternative embodiments, one or other of the voltages V1 and V2 It could be at a fixed voltage level, for example, the common mode voltage VCM. The operation of the circuit of FIG. 5 will now be described with reference to the timing diagrams of FIGS. 6A and 6B. Fig. 6A is a graph illustrating examples of the voltage signals V1 and V2, and Fig. 6B is a graph illustrating examples of the current signal provided by the current ramp generator 500. As shown in Fig. 6A, during the power-up phase of the amplifier circuit of FIG. 1 or 2, the voltage signal V1 comprises a downward voltage ramp, which starts, for example, at a level 602, then descends linearly to a level equal to or near the ground voltage, while the voltage signal V2 comprises a rising voltage ramp, which for example starts at a level equal to or close to the ground voltage, and goes up linearly to the level 602. [0007] As illustrated in FIG. 6B, the rising and falling voltage ramps of the signals V1 and V2 cause a downward current ramp, which starts at a level 604 and goes down to a level of zero or near zero. However, rather than going down linearly, the current ramp has a hyperbolic shape, with smooth gradient transitions rather than angles at the beginning and at the end of the ramp. The initial level 604 and the maximum gradient of the current ramp are determined by the initial level 602, the size of the current source 508, and the gradient of the voltage ramps of the signals V1 and V2. Referring again to FIG. 6A, during a power off phase of the amplifier circuit of FIG. 1 or 2, the voltage signal V1 includes a rising voltage ramp, which for example starts at a low level equal to or near the ground, and linearly goes up to level 602, while the voltage signal V2 includes a downward voltage ramp, which starts at level 602 and goes down linearly to a level equal to or close to the mass voltage. Referring again to FIG. 6B, the rising and falling voltage ramps of the signals V1 and V2 cause a rising current ramp, which begins at a level close to zero or zero, and increases to the level 604. [0008] However, rather than increasing linearly, the current ramp has a hyperbolic shape, with smooth gradient transitions rather than angles at the beginning and at the end of the ramp. This leads to a decrease in the second derivative of the current ramp, and so for a given acceptable level of switching noise, the ramp can rise and fall faster than in the case of the linear ramp. An advantage of the embodiments described herein is that the switching noise can be reduced or completely suppressed by a single circuit, and without requiring the use of a DAC. [0009] Furthermore, by implementing a current ramp generator using a differential pair as described in connection with FIGS. 5, 6A and 6B, a current ramp without angles can be generated, which further reduces more the risk of switching noises and / or speeds up the power on and off sequences. With the description thus made of at least one illustrative embodiment, various alterations, modifications and improvements will be readily apparent to those skilled in the art. For example, it will be clear to those skilled in the art that the supply voltages described herein could be of any level, and that the ground voltage could be replaced by a positive or negative voltage. In addition, although the common mode voltage is described as being at a midpoint between the high and low supply voltages, other levels would be possible. Further, it will be clear to those skilled in the art that, although audio amplifiers have been described in relation to FIGS. 1 and 2 based on inverter amplifier configurations, in other embodiments of Different configurations of amplifiers would be possible. It will also be clear to those skilled in the art that other forms of ramps could be used, and that the circuits shown in FIGS. 3 and 5 for implementing a current ramp generator are only examples, and that many other circuit designs would be possible. In addition, it will be clear to those skilled in the art that the various elements described in connection with the various embodiments could be combined, in alternative embodiments, in any combination.
权利要求:
Claims (10) [0001] REVENDICATIONS1. An amplifier circuit comprising: an amplifier (102) having a first input coupled to an input node of the amplifier circuit via a first resistor (R1) and an output coupled to a load (104) via a a coupling capacitor (112), the output being coupled to the first input via a second resistor (R2); and a current ramp generator (114, 314, 500) adapted to provide a current ramp at the first input of the amplifier during a power-up phase or a power-off phase of the amplifier circuit to control the amplifier. charge or discharge speed of the coupling capacitor. [0002] An amplifier circuit according to claim 1, wherein during a power up phase of the amplifier circuit, the current ramp generator (114, 314, 500) is adapted to provide a current ramp starting at a first level and down to a second level. [0003] An amplifier circuit according to claim 2, wherein the first level causes the amplifier to be saturated. [0004] 4. Amplifier circuit according to claims 2 or 3, wherein the second level is less than or equal to 1 11A. [0005] An amplifier circuit as claimed in any one of claims 1 to 4, wherein the current ramp has a gradient which results in a voltage gradient of at least 1 V / s at the output (VOUT) of the amplifier circuit. [0006] An amplifier circuit as claimed in any one of claims 1 to 5, wherein the current ramp generator (114, 314, 500) is adapted to convert a first voltage ramp into said current ramp. [0007] The amplifier circuit of claim 6, wherein the current ramp generator (114, 314, 500) comprises a differential pair (502, 504), a first one of the differential pair transistors being controlled by the first ramp. Of voltage. [0008] An amplifier circuit according to claim 7, wherein a second one of the transistors of the differential pair is controlled by a second voltage ramp having a sign gradient opposite that of the first voltage ramp. [0009] An amplifier circuit as claimed in any one of claims 1 to 8, wherein the amplifier is mounted as an inverting amplifier configuration. [0010] A method for powering on or off an amplifier circuit, comprising: providing a current ramp at a first input of an amplifier (102) of the amplifier circuit, the first input coupled to an input node of the amplifier circuit; amplifier circuit via a first resistor (R1), an output of the amplifier being coupled to a load (104) via a coupling capacitor (112) and at the first input by the intermediate of a second resistor (R2), the current ramp controlling the charging or discharging speed of the coupling capacitor, and applying an input signal to the input node of the amplifier circuit.
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同族专利:
公开号 | 公开日 US20160065143A1|2016-03-03| FR3025373B1|2018-06-08| US9641134B2|2017-05-02|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题 WO2002015388A2|2000-08-11|2002-02-21|Maxim Integrated Products, Inc.|Amplifier circuits and methods to provide smooth transition of amplifier outputs during powering sequences| EP1879290A2|2006-07-14|2008-01-16|Wolfson Microelectronics plc|Amplifier circuits, methods of starting and stopping amplifier circuits| US20090196435A1|2008-01-31|2009-08-06|Qualcomm Incorporated|System and method of reducing click and pop noise in audio playback devices| US6940345B2|2003-12-31|2005-09-06|Intel Corporation|Supplying a ramp voltage to an amplifier| JP2008219686A|2007-03-07|2008-09-18|Fujitsu Ltd|Sound output circuit and sound output method|US9923529B2|2016-02-03|2018-03-20|Samsung Electronics Co., Ltd|Customizable ramp-up and ramp-down amplitude profiles for a digital power amplifierbased transmitter| CN111464917A|2017-04-28|2020-07-28|华为技术有限公司|POP sound suppression method, audio output circuit and terminal| CN109121043B|2017-06-23|2021-09-03|华为技术有限公司|Audio processing circuit and terminal equipment| FR3069397B1|2017-07-18|2020-12-11|Dolphin Integration Sa|CIRCUIT AND METHOD FOR CONTROL OF AN AUDIO AMPLIFIER|
法律状态:
2015-08-25| PLFP| Fee payment|Year of fee payment: 2 | 2016-03-04| PLSC| Search report ready|Effective date: 20160304 | 2016-08-23| PLFP| Fee payment|Year of fee payment: 3 | 2017-08-08| PLFP| Fee payment|Year of fee payment: 4 | 2018-08-16| PLFP| Fee payment|Year of fee payment: 5 | 2019-08-26| PLFP| Fee payment|Year of fee payment: 6 | 2020-08-26| PLFP| Fee payment|Year of fee payment: 7 | 2021-04-02| CA| Change of address|Effective date: 20210223 | 2021-04-02| TP| Transmission of property|Owner name: DOLPHIN DESIGN, FR Effective date: 20210223 | 2021-08-30| PLFP| Fee payment|Year of fee payment: 8 |
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申请号 | 申请日 | 专利标题 FR1457987A|FR3025373B1|2014-08-26|2014-08-26|REDUCTION NOISE REDUCTION CIRCUIT|FR1457987A| FR3025373B1|2014-08-26|2014-08-26|REDUCTION NOISE REDUCTION CIRCUIT| US14/832,910| US9641134B2|2014-08-26|2015-08-21|Circuit for reducing pop noise| 相关专利
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